Datasheet

43
9166DS–AVR-01/12
AT32UC3C
5.4 CPU Local Bus Mapping
Some of the registers in the GPIO module are mapped onto the CPU local bus, in addition to
being mapped on the Peripheral Bus. These registers can therefore be reached both by
accesses on the Peripheral Bus, and by accesses on the local bus.
Mapping these registers on the local bus allows cycle-deterministic toggling of GPIO pins since
the CPU and GPIO are the only modules connected to this bus. Also, since the local bus runs at
CPU speed, one write or read operation can be performed per clock cycle to the local bus-
mapped GPIO registers.
The following GPIO registers are mapped on the local bus:
0xFFFF6000
ACIFA0 Analog Comparators Interface - ACIFA0
0xFFFF6400
ACIFA1 Analog Comparators Interface - ACIFA1
0xFFFF6800
DACIFB0 DAC interface - DACIFB0
0xFFFF6C00
DACIFB1 DAC interface - DACIFB1
0xFFFF7000
AW aWire - AW
Table 5-3. Peripheral Address Mapping
Table 5-4. Local bus mapped GPIO registers
Port Register Mode
Local Bus
Address Access
A Output Driver Enable Register (ODER) WRITE 0x40000040 Write-only
SET 0x40000044 Write-only
CLEAR 0x40000048 Write-only
TOGGLE 0x4000004C Write-only
Output Value Register (OVR) WRITE 0x40000050 Write-only
SET 0x40000054 Write-only
CLEAR 0x40000058 Write-only
TOGGLE 0x4000005C Write-only
Pin Value Register (PVR) - 0x40000060 Read-only