Datasheet

17
9166DS–AVR-01/12
AT32UC3C
3.2.2 Peripheral Functions
Each GPIO line can be assigned to one of several peripheral functions. The following table
describes how the various peripheral functions are selected. The last listed function has priority
in case multiple functions are enabled on the same pin.
3.2.3 Oscillator Pinout
The oscillators are not mapped to the normal GPIO functions and their muxings are controlled
by registers in the System Control Interface (SCIF). Please refer to the SCIF chapter for more
information about this.
3.2.4 JTAG port connections
If the JTAG is enabled, the JTAG will take control over a number of pins, irrespectively of the I/O
Controller configuration.
3.2.5 Nexus OCD AUX port connections
If the OCD trace system is enabled, the trace system will take control over a number of pins, irre-
spectively of the GPIO configuration. Three different OCD trace pin mappings are possible,
Table 3-2. Peripheral Functions
Function Description
GPIO Controller Function multiplexing GPIO and GPIO peripheral selection A to F
Nexus OCD AUX port connections OCD trace system
aWire DATAOUT aWire output in two-pin mode
JTAG port connections JTAG debug port
Oscillators OSC0, OSC32
Table 3-3. Oscillator pinout
QFN64/
TQFP64 pin TQFP100 pin LQFP144 pin Pad Oscillator pin
31 47 69 PB30 xin0
99 143 PB02 xin1
62 96 140 PB00 xin32
32 48 70 PB31 xout0
100 144 PB03 xout1
63 97 141 PB01 xout32
Table 3-4. JTAG pinout
QFN64/
TQFP64 pin TQFP100 pin LQFP144 pin Pin name JTAG pin
222PA01TDI
333PA02TDO
444PA03TMS
111PA00TCK