Datasheet

43
32117DS–AVR-01/12
AT32UC3C
5.4 CPU Local Bus Mapping
Some of the registers in the GPIO module are mapped onto the CPU local bus, in addition to
being mapped on the Peripheral Bus. These registers can therefore be reached both by
accesses on the Peripheral Bus, and by accesses on the local bus.
Mapping these registers on the local bus allows cycle-deterministic toggling of GPIO pins since
the CPU and GPIO are the only modules connected to this bus. Also, since the local bus runs at
CPU speed, one write or read operation can be performed per clock cycle to the local bus-
mapped GPIO registers.
0xFFFF3800
TWIM0 Two-wire Master Interface - TWIM0
0xFFFF3C00
TWIM1 Two-wire Master Interface - TWIM1
0xFFFF4000
TWIS0 Two-wire Slave Interface - TWIS0
0xFFFF4400
TWIS1 Two-wire Slave Interface - TWIS1
0xFFFF4800
IISC Inter-IC Sound (I2S) Controller - IISC
0xFFFF4C00
PWM Pulse Width Modulation Controller - PWM
0xFFFF5000
QDEC0 Quadrature Decoder - QDEC0
0xFFFF5400
QDEC1 Quadrature Decoder - QDEC1
0xFFFF5800
TC1 Timer/Counter - TC1
0xFFFF5C00
PEVC Peripheral Event Controller - PEVC
0xFFFF6000
ACIFA0 Analog Comparators Interface - ACIFA0
0xFFFF6400
ACIFA1 Analog Comparators Interface - ACIFA1
0xFFFF6800
DACIFB0 DAC interface - DACIFB0
0xFFFF6C00
DACIFB1 DAC interface - DACIFB1
0xFFFF7000
AW aWire - AW
Table 5-3. Peripheral Address Mapping