Datasheet

51
32059L–AVR32–01/2012
AT32UC3B
9.10 JTAG Characteristics
9.10.1 JTAG Timing
Figure 9-6. JTAG Interface Signals
Note: 1. These values are based on simulation and characterization of other AVR microcontrollers
manufactured in the same pro-cess technology. These values are not covered by test limits in
production.
JTAG2
JTAG3
JTAG1
JTAG4
JTAG0
TMS/TDI
TCK
TDO
JTAG5
JTAG6
JTAG7 JTAG8
JTAG9
JTAG10
Boundary
Scan Inputs
Boundary
Scan Outputs
Table 9-26. JTAG Timings
(1)
Symbol Parameter Conditions Min Max Units
JTAG0 TCK Low Half-period
V
VDDIO
from
3.0V to 3.6V,
maximum
external
capacitor =
40pF
23.2 ns
JTAG1 TCK High Half-period 8.8 ns
JTAG2 TCK Period 32.0 ns
JTAG3 TDI, TMS Setup before TCK High 3.9 ns
JTAG4 TDI, TMS Hold after TCK High 0.6 ns
JTAG5 TDO Hold Time 4.5 ns
JTAG6 TCK Low to TDO Valid 23.2 ns
JTAG7 Boundary Scan Inputs Setup Time 0 ns
JTAG8 Boundary Scan Inputs Hold Time 5.0 ns
JTAG9 Boundary Scan Outputs Hold Time 8.7 ns
JTAG10 TCK to Boundary Scan Outputs Valid 17.7 ns