Datasheet

44
32059L–AVR32–01/2012
AT32UC3B
Notes: 1. Core frequency is generated from XIN0 using the PLL so that 140 MHz < f
PLL0
< 160 MHz and 10 MHz < f
XIN0
< 12 MHz.
Frozen
See Active mode conditions
0.0723xf(MHz)+0.15
6
mA/MHz
Same conditions at 60 MHz 4.5 mA
Standby
See Active mode conditions
0.0537xf(MHz)+0.16
6
mA/MHz
Same conditions at 60 MHz 3.4 mA
Stop
- CPU running in sleep mode
- XIN0, Xin1 and XIN32 are stopped.
- All peripheral clocks are desactived.
- GPIOs are inactive with internal pull-up, JTAG unconnected with external pull-
up and Input pins are connected to GND.
62 µA
Deepstop See Stop mode conditions 30 µA
Static See Stop mode conditions
Voltage Regulator On 15.5
µA
Voltage Regulator Off 7.5
Table 9-11. Power Consumption for Different Sleep Modes for AT32UC3B0512, AT32UC3B1512
Mode Conditions Typ. Unit
Table 9-12. Peripheral Interface Power Consumption in Active Mode
Peripheral Conditions Consumption Unit
INTC
AT32UC3B064
AT32UC3B0128
AT32UC3B0256
AT32UC3B164
AT32UC3B1128
AT32UC3B1256
AT32UC3B0512
AT32UC3B1512
20
µA/MHz
GPIO 16
PDCA 12
USART 14
USB 23
ADC 8
TWI 7
PWM 18
SPI 8
SSC 11
TC 11
ABDAC
AT32UC3B0512
AT32UC3B1512
6