Datasheet

45
32072SH–AVR32–10/2012
AT32UC3A3
7.5.3 Reset Sequence
Table 7-9. BOD Timing
Symbol Parameter Conditions Min. Typ. Max. Unit
T
BOD
Minimum time with VDDCORE <
VBOD to detect power failure
Falling VDDCORE from 1.8V to 1.1V 300 800 ns
Table 7-10. Electrical Characteristics
Symbol Parameter Conditions Min. Typ. Max. Unit
V
DDRR
VDDIN/VDDIO rise rate to ensure
power-on-reset
0.8 V/ms
V
POR+
Rising threshold voltage: voltage up
to which device is kept under reset by
POR on rising VDDIN
Rising VDDIN: V
RESTART
-> V
POR+
2.7 V
V
POR-
Falling threshold voltage: voltage
when POR resets device on falling
VDDIN
Falling VDDIN: 3.3V -> V
POR-
2.7 V
V
RESTART
On falling VDDIN, voltage must go
down to this value before supply can
rise again to ensure reset signal is
released at V
POR+
Falling VDDIN: 3.3V -> V
RESTART
0.2 V
T
SSU1
Time for Cold System Startup: Time
for CPU to fetch its first instruction
(RCosc not calibrated)
480 960 µs
T
SSU2
Time for Hot System Startup: Time for
CPU to fetch its first instruction
(RCosc calibrated)
420 µs