Datasheet

49
32072SH–AVR32–10/2012
AT32UC3A3
7.6.1 Power Consumtion for Different Sleep Modes
Notes: 1. Core frequency is generated from XIN0 using the PLL.
Table 7-12. Power Consumption for Different Sleep Modes
Mode Conditions
(1)
Typ. Unit
Active
- CPU running a recursive Fibonacci Algorithm from flash and clocked from PLL0
at f MHz.
- Flash High Speed mode disable (f < 66 MHz)
- Voltage regulator is on.
- XIN0: external clock. Xin1 Stopped. XIN32 stopped.
- All peripheral clocks activated with a division by 8.
- GPIOs are inactive with internal pull-up, JTAG unconnected with external
pullup and Input pins are connected to GND
0.626xf(MHz)+2.257 mA/MHz
Same conditions with Flash High Speed mode enable (66< f < 84 MHz) 0.670xf(MHz)+2.257 mA/MHz
Same conditions with Flash High Speed mode disable at 60 MHz 40 mA
Idle See Active mode conditions 0.349xf(MHz)+0.968 mA/MHz
Same conditions at 60 MHz 21.8 mA
Frozen See Active mode conditions 0.098xf(MHz)+1.012 mA/MHz
Same conditions at 60 MHz 6.6 mA
Standby See Active mode conditions 0.066xf(MHz)+1.010 mA/MHz
Same conditions at 60 MHz 4.6 mA
Stop
- CPU running in sleep mode
- XIN0, Xin1 and XIN32 are stopped.
- All peripheral clocks are desactived.
- GPIOs are inactive with internal pull-up, JTAG unconnected with external
pullup and Input pins are connected to GND.
96 µA
Deepstop See Stop mode conditions 54 µA
Static
T
A
= 25 °C
CPU is in static mode
GPIOs on internal pull-up
All peripheral clocks de-activated
DM and DP pins connected to ground
XIN0, Xin1 and XIN32 are stopped
on Amp0 31 µA