Datasheet

95
32072H–AVR32–10/2012
AT32UC3A3
9.6.2 Clear Register
Name: CLR
Access Type: Write-only
Offset: 0x04
Reset Value: 0x00000000
•CLR:
Writing periodically any value to this field when the WDT is enabled, within the watchdog time-out period, will prevent a
watchdog reset.
This field always reads as zero.
31 30 29 28 27 26 25 24
CLR[31:24]
23 22 21 20 19 18 17 16
CLR[23:16]
15 14 13 12 11 10 9 8
CLR[15:8]
76543210
CLR[7:0]