Datasheet

921
32072H–AVR32–10/2012
AT32UC3A3
34.7.3 Interrupt Mask Register
Name:
IMR
Access Type: Read-only
Offset: 0x0C
Reset Value: 0x00000000
1: The corresponding interrupt is enabled.
0: The corresponding interrupt is disabled.
A bit in this register is set when the corresponding bit in IER is written to one.
A bit in this register is cleared when the corresponding bit in IDR is written to one.
31 30 29 28 27 26 25 24
--TXREADYUNDERRUN----
23 22 21 20 19 18 17 16
--------
15 14 13 12 11 10 9 8
--------
76543210
--------