Datasheet

918
32072H–AVR32–10/2012
AT32UC3A3
34.7 User Interface
Table 34-2. ABDAC Register Memory Map
Offset Register Register Name Access Reset
0x00 Sample Data Register SDR Read/Write 0x00000000
0x08 Control Register CR Read/Write 0x00000000
0x0C Interrupt Mask Register IMR Read-only 0x00000000
0x10 Interrupt Enable Register IER Write-only 0x00000000
0x14 Interrupt Disable Register IDR Write-only 0x00000000
0x18 Interrupt Clear Register ICR Write-only 0x00000000
0x1C Interrupt Status Register ISR Read-only 0x00000000