Datasheet

807
32072H–AVR32–10/2012
AT32UC3A3
29.7.10 Interrupt Mask Register
Name:
IMR
Access Type: Read-only
Offset: 0x2C
Reset Value: 0x00000000
0: The corresponding interrupt is disabled.
1: The corresponding interrupt is enabled.
A bit in this register is cleared when the corresponding bit in IDR is written to one.
A bit in this register is cleared when the corresponding bit in IER is written to one.
31 30 29 28 27 26 25 24
––––––––
23 22 21 20 19 18 17 16
––––RXBUFFENDRXGOVREDRDY
15 14 13 12 11 10 9 8
OVRE7 OVRE6 OVRE5 OVRE4 OVRE3 OVRE2 OVRE1 OVRE0
76543210
EOC7 EOC6 EOC5 EOC4 EOC3 EOC2 EOC1 EOC0