Datasheet

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32072H–AVR32–10/2012

AT32UC3A3

27.8.3.11 Pipe Enable/Reset Register

Access Type: Read/Write

Offset: 0x0041C

Reset Value: 0x00000000

• PRSTn: Pipe n Reset

Writing a one to this bit will reset the Pipe n FIFO.

This resets the endpoint n registers (UPCFGn, UPSTAn, UPCONn) but not the endpoint configuration (ALLOC, PBK, PSIZE,

PTOKEN, PTYPE, PEPNUM, INTFRQ).

All the endpoint mechanism (FIFO counter, reception, transmission, etc.) is reset apart from the Data Toggle management.

The endpoint configuration remains active and the endpoint is still enabled.

Writing a zero to this bit will complete the reset operation and allow to start using the FIFO.

• PENn: Pipe n Enable

Writing a one to this bit will enable the Pipe n.

Writing a zero to this bit will disable the Pipe n, what forces the Pipe n state to inactive and resets the pipe n registers (UPCFGn,

UPSTAn, UPCONn) but not the pipe configuration (ALLOC, PBK, PSIZE).

31 30 29 28 27 26 25 24

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23 22 21 20 19 18 17 16

PRST7 PRST6 PRST5 PRST4 PRST3 PRST2 PRST1 PRST0

15 14 13 12 11 10 9 8

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76543210

PEN7 PEN6 PEN5 PEN4 PEN3 PEN2 PEN1 PEN0