Datasheet

711
32072H–AVR32–10/2012
AT32UC3A3
27.8.2.17 Device DMA Channel n Next Descriptor Address Register
Register Name: UDDMAnNEXTDESC, n in [1..7]
Access Type: Read/Write
Offset: 0x0310 + (n - 1) * 0x10
Reset Value: 0x00000000
• NXTDESCADDR: Next Descriptor Address
This field contains the bits 31:4 of the 16-byte aligned address of the next channel descriptor to be processed.
This field is written either or by descriptor loading.
31 30 29 28 27 26 25 24
NXTDESCADDR[31:24]
23 22 21 20 19 18 17 16
NXTDESCADDR[23:16]
15 14 13 12 11 10 9 8
NXTDESCADDR[15:8]
76543210
NXTDESCADDR[7:4] - - - -