Datasheet

532
32072H–AVR32–10/2012
AT32UC3A3
• CKG: Transmit Clock Gating Selection
• CKI: Transmit Clock Inversion
CKI affects only the Transmit Clock and not the output clock signal.
1: The data outputs (Data and Frame Sync signals) are shifted out on transmit clock rising edge. The Frame sync signal input is
sampled on transmit clock falling edge.
0: The data outputs (Data and Frame Sync signals) are shifted out on transmit clock falling edge. The Frame sync signal input is
sampled on transmit clock rising edge.
• CKO: Transmit Clock Output Mode Selection
• CKS: Transmit Clock Selection
CKG Transmit Clock Gating
0 None, continuous clock
1 Transmit Clock enabled only if TX_FRAME_SYNC is low
2 Transmit Clock enabled only if TX_FRAME_SYNC is high
3 Reserved
CKO Transmit Clock Output Mode TX_CLOCK pin
0 None Input-only
1 Continuous transmit clock Output
2 Transmit clock only during data transfers Output
Others Reserved
CKS Selected Transmit Clock
0 Divided Clock
1 RX_CLOCK clock signal
2 TX_CLOCK Pin
3 Reserved