Datasheet

525
32072H–AVR32–10/2012
AT32UC3A3
24.9.1 Control Register
Name: CR
Access Type: Write-only
Offset: 0x00
Reset value: 0x00000000
• SWRST: Software Reset
1: Writing a one to this bit will perform a software reset. This software reset has priority on any other bit in CR.
0: Writing a zero to this bit has no effect.
• TXDIS: Transmit Disable
1: Writing a one to this bit will disable the transmission. If a character is currently being transmitted, the disable occurs at the end
of the current character transmission.
0: Writing a zero to this bit has no effect.
• TXEN: Transmit Enable
1: Writing a one to this bit will enable the transmission if the TXDIS bit is not written to one.
0: Writing a zero to this bit has no effect.
• RXDIS: Receive Disable
1: Writing a one to this bit will disable the reception. If a character is currently being received, the disable occurs at the end of
current character reception.
0: Writing a zero to this bit has no effect.
• RXEN: Receive Enable
1: Writing a one to this bit will enables the reception if the RXDIS bit is not written to one.
0: Writing a zero to this bit has no effect.
31 30 29 28 27 26 25 24
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23 22 21 20 19 18 17 16
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15 14 13 12 11 10 9 8
SWRST-----TXDISTXEN
76543210
------RXDISRXEN