Datasheet
400
32072H–AVR32–10/2012
AT32UC3A3
20.6.13 Interrupt Flag Register
Name: IFR
Access Type: Read, Clear
Offset: 0xD0, 0xD8
Reset Value: -
• P0-31: Interrupt Flag
1: An interrupt condition has been detected on the corresponding pin.
0: No interrupt condition has beedn detected on the corresponding pin since reset or the last time it was cleared.
The number of interrupt request lines is dependant on the number of I/O pins on the MCU. Refer to the product specific data for
details. Note also that a bit in the Interrupt Flag register is only valid if the corresponding bit in IER is set.
31 30 29 28 27 26
25 24
P31 P30 P29 P28 P27 P26 P25 P24
23 22 21 20 19 18 17 16
P23 P22 P21 P20 P19 P18 P17 P16
15 14 13 12 11 10 9 8
P15 P14 P13 P12 P11 P10 P9 P8
76543210
P7 P6 P5 P4 P3 P2 P1 P0