Datasheet
387
32072H–AVR32–10/2012
AT32UC3A3
register offset and the port offset to the GPIO start address. One bit in each of the configuration
registers corresponds to an I/O pin.
Table 20-1. GPIO Register Memory Map
Offset Register Function Name Access Reset value
0x00 GPIO Enable Register Read/Write GPER Read/Write (1)
0x04 GPIO Enable Register Set GPERS Write-Only
0x08 GPIO Enable Register Clear GPERC Write-Only
0x0C GPIO Enable Register Toggle GPERT Write-Only
0x10 Peripheral Mux Register 0 Read/Write PMR0 Read/Write (1)
0x14 Peripheral Mux Register 0 Set PMR0S Write-Only
0x18 Peripheral Mux Register 0 Clear PMR0C Write-Only
0x1C Peripheral Mux Register 0 Tog gle PMR0T Write-Only
0x20 Peripheral Mux Register 1 Read/Write PMR1 Read/Write (1)
0x24 Peripheral Mux Register 1 Set PMR1S Write-Only
0x28 Peripheral Mux Register 1 Clear PMR1C Write-Only
0x2C Peripheral Mux Register 1 Toggle PMR1T Write-Only
0x40 Output Driver Enable Register Read/Write ODER Read/Write (1)
0x44 Output Driver Enable Register Set ODERS Write-Only
0x48 Output Driver Enable Register Clear ODERC Write-Only
0x4C Output Driver Enable Register Toggle ODERT Write-Only
0x50 Output Value Register Read/Write OVR Read/Write (1)
0x54 Output Value Register Set OVRS Write-Only
0x58 Output Value Register Clear OVRC Write-Only
0x5c Output Value Register To ggle OVRT Write-Only
0x60 Pin Value Register Read PVR Read-Only (2)
0x70 Pull-up Enable Register Read/Write PUER Read/Write (1)
0x74 Pull-up Enable Register Set PUERS Write-Only
0x78 Pull-up Enable Register Clear PUERC Write-Only
0x7C Pull-up Enable Register Tog gl e PUERT Write-Only
0x90 Interrupt Enable Register Read/Write IER Read/Write (1)
0x94 Interrupt Enable Register Set IERS Write-Only
0x98 Interrupt Enable Register Clear IERC Write-Only
0x9C Interrupt Enable Register Togg le IERT Write-Only
0xA0 Interrupt Mode Register 0 Read/Write IMR0 Read/Write (1)
0xA4 Interrupt Mode Register 0 Set IMR0S Write-Only
0xA8 Interrupt Mode Register 0 Clear IMR0C Write-Only
0xAC Interrupt Mode Register 0 Toggle IMR0T Write-Only
0xB0 Interrupt Mode Register 1 Read/Write IMR1 Read/Write (1)