Datasheet

230
32072H–AVR32–10/2012
AT32UC3A3
Figure 16-9. Low Power Mode Behavior
16.7.6.3 Deep power-down mode
This mode is selected by writing the value three to the LPR.LPCB field. When this mode is acti-
vated, all internal voltage generators inside the SDRAM are stopped and all data is lost.
When this mode is enabled, the user must not access to the SDRAM until a new initialization
sequence is done (See Section 16.7.1).
This is described in Figure 16-10 on page 231.
Low Power Mode
CAS = 2T
RCD
= 3
SDCS
SDCK
SDRAMC_A[12:0]
RAS
CAS
SDCKE
D[15:0]
(input)
Dna Dnb Dnc Dnd Dne Dnf
Col fCol eCol dCol cCol bCol aRow n