Datasheet

214
32072H–AVR32–10/2012
AT32UC3A3
15.7.2 Pulse Register
Register Name: PULSE
Access Type: Read/Write
Offset: 0x04 + CS_number*0x10
Reset Value: 0x01010101
• NCSRDPULSE: NCS Pulse Length in READ Access
In standard read access, the NCS signal pulse length is defined as:
The NCS pulse length must be at least one clock cycle.
In page mode read access, the NCSRDPULSE field defines the duration of the first access to one page.
• NRDPULSE: NRD Pulse Length
In standard read access, the NRD signal pulse length is defined in clock cycles as:
The NRD pulse length must be at least one clock cycle.
In page mode read access, the NRDPULSE field defines the duration of the subsequent accesses in the page.
• NCSWRPULSE: NCS Pulse Length in WRITE Access
In write access, the NCS signal pulse length is defined as:
The NCS pulse length must be at least one clock cycle.
• NWEPULSE: NWE Pulse Length
The NWE signal pulse length is defined as:
The NWE pulse length must be at least one clock cycle.
31 30 29 28 27 26 25 24
–
NCSRDPULSE
23 22 21 20 19 18 17 16
–
NRDPULSE
15 14 13 12 11 10 9 8
–
NCSWRPULSE
76543210
–
NWEPULSE
NCS Pulse Length in read access 256 NCSRDPULSE 6[] NCSRDPULSE 5:0[]+×() clock cycles=
NRD Pulse Length 256 NRDPULSE 6[] NRDPULSE 5:0[]+×() clock cycles=
NCS Pulse Length in write access 256 NCSWRPULSE 6[] NCSWRPULSE 5:0[]+×() clock cycles=
NWE Pulse Length 256 NWEPULSE 6[] NWEPULSE 5:0[]+×() clock cycles=