Datasheet

208
32072H–AVR32–10/2012
AT32UC3A3
15.6.8.2 Switching from (to) slow clock mode to (from) normal mode
When switching from slow clock mode to the normal mode, the current slow clock mode transfer
is completed at high clock rate, with the set of slow clock mode parameters. See Figure 15-31
on page 208. The external device may not be fast enough to support such timings.
Figure 15-32 on page 209 illustrates the recommended procedure to properly switch from one
mode to the other.
Figure 15-31. Clock Rate Transition Occurs while the SMC is Performing a Write Operation
CLK_SMC
A[AD_MSB:2]
NBS0, NBS1,
A0, A1
NCS
NWE
Slow Clock Mode
Internal signal from PM
This write cycle finishes with the slow clock mode set
of parameters after the clock rate transition
NWECYCLE = 3
SLOW CLOCK MODE WRITE SLOW CLOCK MODE WRITE
11 1
1
1
1
2
3
2
NWECYCLE = 7
NORMAL MODE WRITE
Slow clock mode transition is detected:
Reload Configuration Wait State