Datasheet

205
32072H–AVR32–10/2012
AT32UC3A3
Figure 15-28. NWAIT Assertion in Read Access: Ready Mode (EXNWMODE = 3).
CLK_SMC
A[AD_MSB:2]
NBS0, NBS1,
A0, A1
NCS
NRD
6
6
5
5
4
4
3
2
3
1
21
0
NWAIT
Internally synchronized
NWAIT signal
Read cycle
EXNWMODE = 3 (Ready mode)
READMODE = 0 (NCS_controlled)
NRDPULSE = 7
NCSRDPULSE = 7
1
0
0
Assertion is ignored
Assertion is ignored
Wait STATE