Datasheet

175
32072H–AVR32–10/2012
AT32UC3A3
14.7 Application Example
14.7.1 Hardware Interface
Note: 1. NWE1 enables upper byte writes. NWE0 enables lower byte writes.
2. NBS1 enables upper byte writes. NBS0 enables lower byte writes.
Table 14-9. EBI Pins and External Static Devices Connections
Pins name
Pins of the Interfaced Device
8-bit Static
Device
2 x 8-bit
Static
Devices
16-bit Static
Device
Controller SMC
DATA[7:0] D[7:0] D[7:0] D[7:0]
DATA[15:0 – D[15:8] D[15:8]
ADDR[0] A[0] – NBS0
(2)
ADDR[1] A[1] A[0] A[0]
ADDR[23:2] A[23:2] A[22:1] A[22:1]
NCS[0] - NCS[5] CS CS CS
NRD OE OE OE
NWE0 WE WE
(1)
WE
NWE1 – WE
(1)
NBS1
(2)
Table 14-10. EBI Pins and External Devices Connections
Pins name
Pins of the Interfaced Device
SDRAM
Compact
Flash
Smart Media
or
NAND Flash
Controller SDRAMC SMC
DATA[7:0] D[7:0] D[7:0] AD[7:0]
DATA[15:8] D[15:8] D[15:8] AD[15:8]
ADDR[0] DQM0 A[0] –
ADDR[1] – A[1] –
ADDR[10:2] A[8:0] A[10:2] –
ADDR[11] A[9] – –
SDA10 A[10] – –
ADDR[12] – – –
ADDR[14:13] A[12:11] – –
ADDR[15] – – –
ADDR[16] BA0 – –
ADDR[17] BA1 – –
ADDR[20:18] – – –