Datasheet

123
32072H–AVR32–10/2012
AT32UC3A3
11.7.10 Test Register
Name: TEST
Access Type: Read/Write
Offset: 0x024
Reset Value: 0x00000000
• TESTEN: Test Enable
0: This bit disables external interrupt test mode.
1: This bit enables external interrupt test mode.
•INTn: External Interrupt n
If TESTEN is 1, the value written to this bit will be the value to the interrupt detector and the value on the pad will be ignored.
• NMI: Non-Maskable Interrupt
If TESTEN is 1, the value written to this bit will be the value to the interrupt detector and the value on the pad will be ignored.
31 30 29 28 27 26 25 24
--------
23 22 21 20 19 18 17 16
--------
15 14 13 12 11 10 9 8
-------NMI
76543210
INT7 INT6 INT5 INT4 INT3 INT2 INT1 INT0