Datasheet

1015
32072HAVR3210/2012
AT32UC3A3
16.4 I/O Lines Description .....................................................................................220
16.5 Application Example ......................................................................................221
16.6 Product Dependencies ..................................................................................222
16.7 Functional Description ...................................................................................223
16.8 User Interface ................................................................................................232
17 Error Corrected Code Controller (ECCHRS) ...................................... 246
17.1 Features ........................................................................................................246
17.2 Overview ........................................................................................................246
17.3 Block Diagram ...............................................................................................247
17.4 Product Dependencies ..................................................................................247
17.5 Functional Description ...................................................................................248
17.6 User Interface ...............................................................................................254
17.7 Module Configuration ....................................................................................280
18 Peripheral DMA Controller (PDCA) .................................................... 281
18.1 Features ........................................................................................................281
18.2 Overview ........................................................................................................281
18.3 Block Diagram ...............................................................................................282
18.4 Product Dependencies ..................................................................................282
18.5 Functional Description ...................................................................................283
18.6 Performance Monitors ...................................................................................285
18.7 User Interface ................................................................................................286
18.8 Module Configuration ....................................................................................314
19 DMA Controller (DMACA) .................................................................... 316
19.1 Features ........................................................................................................316
19.2 Overview ........................................................................................................316
19.3 Block Diagram ...............................................................................................317
19.4 Product Dependencies ..................................................................................317
19.5 Functional Description ...................................................................................318
19.6 Arbitration for HSB Master Interface ..............................................................323
19.7 Memory Peripherals ......................................................................................323
19.8 Handshaking Interface ...................................................................................323
19.9 DMACA Transfer Types ................................................................................325
19.10 Programming a Channel ................................................................................329
19.11 Disabling a Channel Prior to Transfer Completion ........................................346
19.12 User Interface ................................................................................................348