Datasheet

AT30TSE004A [DATASHEET]
Atmel-8868C-DTS-AT30TSE004A-Datasheet_122013
8
4.4 No-Acknowledge (NACK)
When the AT30TSE004A is transmitting data to the Master, the Master can indicate that it is done receiving data
and wants to end the operation by sending a NACK response to the AT30TSE004A instead of an ACK
response. This is accomplished by the Master outputting a Logic 1 during the ACK/NACK clock cycle, at which
point the AT30TSE004A will release the SDA line so that the Master can then generate a Stop condition.
In addition, the AT30TSE004A can use a NACK to respond to the Master instead of an ACK for certain invalid
operation cases such as an attempt to Write to a read-only register (e.g. an attempt to Write to the Temperature
Register).
Figure 4-1. Start, Stop, and ACK
4.5 Standby Mode
The AT30TSE004A incorporates a low-power Standby Mode which is enabled:
 Upon power-up or
 After the receipt of the Stop condition and the completion of any internal operations.
4.6 Device Reset and Initialization
The AT30TSE004A incorporates an internal Power-On Reset (POR) circuit to help prevent inadvertent
operations during power-up and power-down cycles. On a cold power-up, the supply voltage must rise
monotonically between V
POR(max)
and V
CC(min)
without any ring back to ensure a proper power-up (see Figure
4-2 on page 9). Once the supply voltage has passed the V
POR(min)
threshold, the device’s internal reset process
is initiated. Completion of the internal reset process occurs within the t
INIT
time listed in Table 4.6.1 on page 9.
Upon completion of the internal reset process, the device will have the following power-on default conditions:
 Temperature sensor starts monitoring temperature continuously.
 Pointer Register = 00h
 Upper Limit, Lower Limit, and Critical Alarm Registers are set to 0C.
 EVENT pin is pulled high by the external pull up resistor.
 Operational mode is Comparator.
 Hysteresis level is set to 0C.
 EVENT pin polarity is set low.
 EVENT output is disabled and not asserted.
 Serial EEPROM’s SPA = 0.
SCL
SDA
SDA
Must Be
Stable
SDA
Change
Allowed
SDA
Change
Allowed
Acknowledge
Valid
Stop
Condition
Start
Condition
12 89
SDA
Must Be
Stable
Acknowledge Window
The transmitting device (Master or Slave) must
release the SDA line at this point to allow the
the receiving device (Master or Slave) to drive
the SDA line low to ACK the previous 8-bit word.
The receiver (Master or Slave)
must release the SDA line at
this point to allow the transmitter
to continue sending new data.