Datasheet

AT30TSE004A [DATASHEET]
Atmel-8868C-DTS-AT30TSE004A-Datasheet_122013
34
Table 7-6. Read RSWP
Notes: 1. X= Don’t care but recommend to be hard-wired to V
CC
or GND.
2. See Section 8.2 for the V
HV
values.
Figure 7-8. Read RSWP
7.4 Serial EEPROM Read Operations
All Read operations are initiated by the Master transmitting a Start bit, a device type identifier of ‘1010’ (Ah),
three software address bits (A2, A1, and A0) that match their corresponding hard-wired address pins (A
2
, A
1
,
and A
0
), and the R/W select bit with a Logic 1 state. In the following clock cycle, the device should respond with
an ACK. The subsequent protocol depends on the type of Read operation desired. There are three Read
operations:
 Current Address Read
 Random Address Read
 Sequential Read
Caution: All Read operations should be preceded by the SPA and or RPA commands to ensure the desired half of
the memory is selected. The reason this is important, for example, during a Sequential Read operation
on the last byte in the first half of the memory (address FFh) with SPA=0 (indicating first half is selected),
the internal address counter will roll-over to address 00h in the first half of memory as opposed to the first
byte in the second half of the memory. For more information on the SPA and RPA commands, see
Section 7.1.1 “Set Page Address and Read Page Address Commands” on page 27.
Function
Pin
Control Byte
Device Type Identifier
Memory Quadrant
Identifier
R/W
A
2
A
1
A
0
B7 B6 B5 B4 B3 B2 B1 B0
Read RSWP, Quadrant 0 X X
0, 1
or
V
HV
0 1 1 0
0 0 1 1
Read RSWP, Quadrant 1 X X 1 0 0 1
Read RSWP, Quadrant 2 X X 1 0 1 1
Read RSWP, Quadrant 3 X X 0 0 0 1
SCK
SDA
Start
by
Master
ACK or NACK
from
Slave
NACK
from
Master
Stop
by
Master
NACK
from
Master
Control Byte Word Address Byte Data Byte
1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9
0 1 1 0 M M M 1 0/1 X X X X X X X X 1 X X X X X X X X 1
MSB MSB MSB
X = Don’t care
M = Memory Quadrant Identifier