Datasheet

33
AT30TSE004A [DATASHEET]
Atmel-8868C-DTS-AT30TSE004A-Datasheet_122013
Figure 7-7. Set RSWP and Clear RSWP
7.3.2 Clear RSWP
Similar to the Set RSWP command, the reversible write protection on all quadrants can be reversed or
unprotected by transmitting the Clear RSWP command. The Clear RSWP sequence requires the Master to
send a Start condition followed by sending a control byte of ‘01100110’ (66h) with the R/
W bit set to a Logic 0.
The AT30TSE004A should respond with an ACK. The Master transmits a word address byte and data bytes
with don’t care values. The AT30TSE004A will respond with either an ACK or NACK to both the word address
and data word. In conjunction with sending the protocol, the A
0
pin must be connected to V
HV
for the duration of
the Clear RSWP command (see Figure 7-7 and Section 8.2). To end the Clear RSWP sequence, the Master
sends a Stop condition.
Caution: The write protection of individual quadrants cannot be reversed separately, and executing the Clear
RSWP command will clear the write protection on all four quadrants leaving all quadrants with no
software write protection.
7.3.3 Read RSWP
The Read RSWP command allows the ability to check a quadrant’s write protection status. To find out if the
Software Write Protection has been set to a specific quadrant, the same procedure that was used to set the
quadrant’s write protection can be utilized except that the R/W select bit is set to a Logic 1, and the A
0
pin is not
required to have V
HV
(see Table 7-6).
The Read RSWP sequence requires sending a control byte of ‘0110MMM1’ (where the ‘M’ represents the
memory quadrant identifier for the quadrant to be read) with the R/W bit set to a Logic 1 (see Figure 7-8).
If the RSWP has not been set, then the AT30TSE004A responds to the control byte with an ACK, and responds
to the word address byte and data word with a NACK. If the RSWP has been set, the AT30TSE004A responds
to all three bytes (control, word address, and data bytes) with a NACK as shown in Table 7-5.
Table 7-5. Serial EEPROM Acknowledge When Reading Protection Status
SCL
SDA
Start
by
Master
ACK
from
Slave
ACK or NACK
from
Slave
Stop
by
Maste
r
ACK or NACK
from
Slave
Control Byte Word Address Byte Data Word
1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9
0 1 1 0 M M M 0 0 X X X X X X X X 0/1 X X X X X X X X 0/1
MSB MSB MSB
X = Don’t care
M = Memory Quadrant Identifier
Quadrant
Status
Instruction
Sent
Instruction
Response
Word Address
Sent
Word Address
Response
Data Word
Sent
Data Word
Response
Write Protected Read RSWP NACK Don’t Care NACK Don’t Care NACK
Not Protected Read RSWP ACK Don’t Care NACK Don’t Care NACK