Datasheet
Table Of Contents
- Features
- Temperature Sensor Features
- Serial EEPROM Features
- Table of Contents
- 1. Description
- 2. Pin Descriptions and Pinouts
- 3. Block Diagram
- 4. Device Communication
- 5. Device Addressing
- 6. Temperature Sensor
- 6.1 Functional Description
- 6.2 Register Descriptions
- 6.2.1 Pointer Register (8-bit Write Only, Address = N/A)
- 6.2.2 Capability Register (16-bit Read-only, Address = 00h)
- 6.2.3 Configuration Register (16-bit Read/Write, Address = 01h)
- 6.2.4 Upper Limit Register (16-bit Read/Write, Address = 02h)
- 6.2.5 Lower Limit Register (16-bit Read/Write, Address = 03h)
- 6.2.6 Critical Alarm Register (16-bit Read/Write, Address = 04h)
- 6.2.7 Temperature Register (16-bit Read-only, Address = 05h)
- 6.2.8 Manufacturer ID Register (16-bit Read-only, Address = 06h)
- 6.2.9 Device ID Register (16-bit Read-only, Address = 07h)
- 6.3 Temperature Sensor Write Operations
- 6.4 Temperature Sensor Read Operations
- 7. Serial EEPROM
- 8. Electrical Specifications
- 9. Ordering Code Detail
- 10. Ordering Information
- 11. Part Markings
- 12. Package Drawings
- 13. Revision History
AT30TSE004A [DATASHEET]
Atmel-8868C-DTS-AT30TSE004A-Datasheet_122013
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7.3 Write Protection
The AT30TSE004A incorporates a Reversible Software Write Protection (RSWP) feature that allows the ability
to selectively write protect data stored in each of the four independent 128-byte Serial EEPROM quadrants.
Table 7-3 identifies the memory quadrant identifier with its associated quadrant, SPA and memory address
locations.
The AT30TSE004A has three RSWP software commands:
Set RSWP command for setting the RSWP.
Clear RSWP command for resetting all of the quadrants that are software write protected.
Read RSWP command for reading the RSWP status.
Table 7-3. Serial EEPROM Memory Organization
7.3.1 Set RSWP
Setting the RSWP is enabled by sending the Set RSWP command, similar to a normal Write command to the
device which programs the Write Protection to the target quadrant. The Set RSWP sequence requires sending
a control byte of ‘0110MMM0’ (where the ‘M’ represents the memory quadrant identifier for the target quadrant
to be write-protected) with the R/W bit set to a Logic 0. In conjunction with sending the protocol, the A
0
pin must
be connected to V
HV
for the duration of RSWP sequence (see Figure 7-7 and Section 8.2). The Set RSWP
command acts on a single quadrant only as specified in the Set RSWP command and can only be reversed by
issuing the Clear RSWP command and will unprotect all quadrants in one operation (see Table 7-4).
Example: If Quadrant 0 and Quadrant 3 are to be write-protected, two separate Set RSWP commands
would be required; however, only one Clear RSWP command is needed to clear and unprotect
both quadrants.
Table 7-4. Set RSWP and Clear RSWP
Notes: 1. X = Don’t care but recommend to be hard-wired to V
CC
or GND.
2. See Section 8.2 for the V
HV
values.
3. Due to the requirement for the A
0
pin to be driven to V
HV
, the Set RSWP and Clear RSWP commands are fully
supported in a single DIMM (isolated DIMM) end application or single DIMM programming station only.
Block SPA Address Locations
Memory Quadrant
Identifier
Quadrant 0 0 00h to 7Fh 001
Quadrant 1 0 80h to FFh 100
Quadrant 2 1 00h to 7Fh 101
Quadrant 3 1 80h to FFh 000
Function
Pin
Control Byte
Device Type Identifier
Memory Quadrant
Identifier
R/W
A
2
A
1
A
0
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1
Bit 0
Set RSWP, Quadrant 0 X X
V
HV
0 1 1 0
0 0 1 0
Set RSWP, Quadrant 1 X X 1 0 0 0
Set RSWP, Quadrant 2 X X 1 0 1 0
Set RSWP, Quadrant 3 X X 0 0 0 0
Clear RSWP X X 0 1 1 0