Datasheet

Table Of Contents
21
AT30TSE004A [DATASHEET]
Atmel-8868C-DTS-AT30TSE004A-Datasheet_122013
6.2.7 Temperature Register (16-bit Read-only, Address = 05h)
The Temperature Register holds the internal temperature measurement data represented in 2’s complement
format allowing for resolution equal to 0.125C (least significant bit). The upper three bits (15, 14, and 13) of the
Temperature Register indicates the trip status of the current temperature and most important, are not affected
by the status of the output of the EVENT pin (see Table 6-13 and Table 6-14).
Table 6-13. Temperature Register Bit Distribution
Table 6-14. Temperature Register Bit Description
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8
Symbol CRITHIGH ALMHIGH ALMLOW SIGN 128°C 64°C 32°C 16°C
Default Value 0 0 0 0 0 0 0 0
R/W Access R R R R R R R R
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Symbol 8°C 4°C 2°C 1°C 0.5°C 0.25°C 0.125°C RFU
Default Value 0 0 0 0 0 0 0 0
R/W Access R R R R R R R R
Bit Symbol Description
15 CRITHIGH
0 = The temperature is less than the Critical Alarm Register setting.
1 = The temperature is greater than or equal to Critical Alarm Register setting.
When this bit is set to a Logic 1, it will automatically clear once the measured temperature
decreases below or is equal to the trip point minus any hysteresis set.
14 ALMHIGH
0 = The temperature is below the Upper Limit Register setting.
1 = The temperature is above the Upper Limit Register setting.
When the bit is set to a Logic 1, it will automatically clear once the measured temperature
decreases below or is equal to the trip point minus any hysteresis set.
13 ALMLOW
0 = The temperature is above the Lower Limit Register setting.
1 = The temperature is below the Lower Limit Register setting.
When the bit is set to a Logic 1, it will automatically clear once the measured temperature
increases above or is to equal to the trip point.
12 SIGN
Sign bit:
0 = The temperature is greater than or equal to 0°C.
1 = The temperature is less than 0°C.
11:1 TEMP
Temperature bits:
Represented in 2’s complement format.
The encoding of bits B11 through B2 is the same as in the limit and alarm registers.
0 RFU Reserved for Future Use. Read as Logic 0.