Datasheet

Table Of Contents
11
AT30TSE004A [DATASHEET]
Atmel-8868C-DTS-AT30TSE004A-Datasheet_122013
5. Device Addressing
The AT30TSE004A is designed to allow the Serial EEPROM and the temperature sensor to operate in parallel
while executing valid command protocol. For example, when the temperature sensor is busy during a
temperature conversion cycle, it is possible to perform any Serial EEPROM operation during this time and vice
versa.
The device requires a 7-bit device address and a Read/Write select bit following a Start condition from the
Master to initiate communication with either the temperature sensor or the Serial EEPROM. The device address
byte is comprised of a 4-bit device type identifier followed by three device address bits (A2, A1,and A0) and a
R/W bit and is clocked by the Master on the SDA pin with the Most Significant Bit first (see Table 5-1).
The AT30TSE004A will respond to three unique device type identifiers. The device type identifier of
‘1010’(Ah) is necessary to select the device for reading or writing. The device type identifier of ‘0110’(6h)
has multiple purposes. First, it is used to access the page address function which determines what the internal
address counter is set to. For more information on accessing the page address function, please refer to Section
7.1.1 “Set Page Address and Read Page Address Commands” on page 27 The device type identifier of
‘0110’(6h) is also used to access the Software Write Protection feature of the device. Information on the
Software Write Protection functionality can be found in Section 7.3 “Write Protection” on page 33.
Table 5-1. AT30TSE004A Device Address Byte
The software device address bits (A2, A1, and A0) must match their corresponding hard-wired device address
inputs (A
2
, A
1
and A
0
) allowing up to eight devices on the bus at the same time (see Table 5-2). The eighth bit of
the address byte is the R/W operation selection bit. A Read operation is selected if this bit is a Logic 1, and a
Serial EEPROM Write operation is selected if this bit is a Logic 0. Upon a compare of the device address byte,
the AT30TSE004A will output an ACK during the ninth clock cycle; if a compare is not true, the device will output
a NACK during the ninth clock cycle and return the device to the low-power Standby Mode.
Table 5-2. Device Address Combinations
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Function Device Type Identifier Device Address Read/Write
Serial EEPROM
Read/Write
1 0 1 0 A2 A1 A0 R/
W
Serial EEPROM Write
Protection and Page
Address Functions
0 1 1 0 A2 A1 A0 R/
W
Temperature Sensor 0 0 1 1 A2 A1 A0 R/
W
Software Device Address Bits Hard-wired Device Address Inputs
A2, A1, A0 A
2
A
1
A
0
0 0 0 GND GND GND
0 0 1 GND GND V
CC
0 1 0 GND V
CC
GND
0 1 1 GND V
CC
V
CC
1 0 0 V
CC
GND GND
1 0 1 V
CC
GND V
CC
1 1 0 V
CC
V
CC
GND
1 1 1 V
CC
V
CC
V
CC