Datasheet

AT30TSE004A [DATASHEET]
Atmel-8868C-DTS-AT30TSE004A-Datasheet_122013
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6.2.6 Critical Alarm Register (16-bit Read/Write, Address = 04h)
The Critical Alarm Register holds the user programmed Critical Alarm temperature boundary trip point in
2’s complement format (0.125°C resolution) that can be utilized to monitor the temperature (see Table 6-11 and
Table 6-12). When the temperature increases above this trip point, the EVENT pin will be asserted (if enabled).
It will remain asserted until temperature decreases below or equal to the trip point minus any hysteresis set.
This register becomes read-only if the Critical Alarm Lock Bit (CRTALML) bit seven in the Configuration
Register is set to a Logic 1.
Table 6-11. Critical Alarm Register Bit Distribution
Table 6-12. Critical Alarm Register Bit Description
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8
Symbol RFU SIGN CRITEVT
Default Value 0 0 0 0 0 0 0 0
R/W Access R R R R/W R/W R/W R/W R/W
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Symbol CRITEVT RFU
Default Value 0 0 0 0 0 0 0 0
R/W Access R/W R/W R/W R/W R/W R/W R R
Bit Symbol Description
15:13 RFU Reserved for Future Use. Read as Logic 0.
12 SIGN
Sign bit:
0 = The temperature is greater than or equal to 0°C.
1 = The temperature is less than 0°C.
11:2 CRITEVT
Critical Alarm temperature bits:
Represented in 2’s complement format.
Read-only access if Alarm Window is locked (Configuration Register bit 6 high).
R/W access if the Alarm Window is unlocked.
0:1 RFU Reserved for Future Use. Read as Logic 0.