User manual
Schematic and Layouts
© 2012 Microchip Technology Inc. DS52057A-page 27
A.3 MCP2210 SPI SLAVE MOTHERBOARD SCHEMATIC AND LAYOUTS
A.3.1 Board – Schematic
HDR M 1x6 RA
J10
GP4
VDD
MI SO
SCK
MOSI
HDR M 1x7 VERT
J11
GP0
GP1
GP2
GP3
GP4
MOSI
HDR M 1x7 VERT
J13
GP8
GP7
GP6
MI SO
VDD
GND
SCK
GP5
Left Side Header
Right Side Header
GP2
GP3
GP8
GP6
GP5
VDD
GND
1
J6
GP2
1
J2
GP3
1
J9
GP8
1
J3
GP5
1
J8
GP6
1
J14
VDD
1
J15
GND
GND
VIN
1
VOUT
2
VSS
3
MCP1525
U5
GND
VDD
VREF
0.1uF
0603
C6
GND
1
J19
VREF
4.7uF
0603
C5
GND
GND
SCK
MOSI
MI SO
0.1uF
0603
C1
VDD
GP0
EEPROM
1
J5
GP0
CS
1
SO
2
WP
3
VSS
4
SI
5
SCK
6
HOLD
7
VCC
8
C
S
S
O
W
P
V
S
S
S
I
SC
S
K
H
OL
D
V
C
C
25LC020
U2
SCK
1
SI
2
SO
3
A1
4
GP5
15
GP6
16
GP7
17
VDD
18
SC
K
S
I
S
O
A
1
GP
5
GP
6
GP
7
V
D
D
A0
5
RESET
6
CS
7
INT
8
VSS
9
GP4
14
GP3
13
GP2
12
GP1
11
GP0
10
MCP23S08
U1
VDD
GND
0.1uF
0603
C2
GND
10k
5%
0603
R7
1k
1%
0603
R2
1k
1%
0603
R3
1k
1%
0603
R4
1k
1%
0603
R5
1k
1%
0603
R6
1k
1%
0603
R8
1k
1%
0603
R9
1k
1%
0603
R10
12
LD1
12
LD2
12
LD3
12
LD4
12
LD5
12
LD6
12
LD7
12
LD8
GND GND GND GND GND GND GND GND
VDD
GND
SCK
MOSI
MI SO
GP4
1
J7
GP4
I/O EXPANDER
HDR M 2x8 VERT
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
J12
GP6
1k
1%
0603
R1
SI /O
1
SCK
2
NC
3
VSS
4
NC
5
NC
6
CS
7
VDD
8
S
I
/
O
SC
K
N
C
VS
S
N
C
N
C
C
S
V
D
D
TC77 SPI 5V
U4
VDD
GND
SCK
MOSI
MISO
GND
GP7
TEMP
1
J4
GP7
1
J17
SCK
1
J16
MOSI
1
J20
MISO
33k
5%
0603
R11
0.1uF
0603
C4
VDD
GND
SCK
MI SO
GND
1k
1%
0603
R15
VDD
GP1
ADC
1
3
2
10k
R17
0.1uF
0603
C3
10k
1%
0603
R16
1
J1
GP1
1
J23
CH0
1
J22
CH1
CH0
1
CH1
2
CH2
3
CH3
4
NC
5
NC
6
DGND
7
CS/SHDN
8
Din
9
Dout
10
CLK
11
AGND
12
Vref
13
Vdd
14
C
H
0
C
H
1
C
H
2
C
H
3
N
C
N
C
DG
N
D
C
S
/
SH
D
N
D
in
Dout
CL
K
A
GN
D
Vr
e
f
Vd
d
MCP3204
U3
1
J18
CH2
1
J21
CH3
VREF
MOSI
GND
4.7uF
0603
C7
1k
1%
0603
R14
1k
1%
0603
R12
1k
1%
0603
R13
Ferrite Bead 0603
L1
AGND
AGND
AGND
PICkit™ Serial Analyzer Header
6 5 4 3 2 1
7 6 5 4 3 2 1
7 6 5 4 3 2 1