Datasheet
MCP73830/L
DS20005049C-page 18 2011-2013 Microchip Technology Inc.
Power dissipation with a 5V, ±10% input voltage
source, 200 mA ±10%, and preconditioning threshold
voltage at 6V is:
EQUATION 6-2:
This power dissipation with the battery charger in the
2x2 TDFN-6 package will result in a temperature of
approximately 10.45C (PCB mounted) above room
temperature.
6.1.1.3 External Capacitors
The MCP73830 is stable with or without a battery load.
In order to maintain good AC stability in Constant Volt-
age mode, a minimum capacitance of 1 µF is
recommended to bypass the V
BAT
pin to V
SS
. This
capacitance provides compensation when there is no
battery load. In addition, the battery and interconnec-
tions appear inductive at high frequencies. These
elements are in the control feedback loop during
Constant Voltage mode. Therefore, the bypass capaci-
tance may be necessary to compensate for the
inductive nature of the battery pack.
A minimum of 16V rated 1 µF is recommended to apply
for output capacitor, and a minimum of 25V rated 1 µF
is recommended to apply for input capacitor for typical
applications.
Virtually any good quality output filter capacitor can be
used independent of the capacitor’s minimum Effective
Series Resistance (ESR) value. The actual value of the
capacitor (and its associated ESR) depends on the out-
put load current. A 1 µF ceramic, tantalum or aluminum
electrolytic capacitor at the output is usually sufficient
to ensure stability.
6.1.1.4 Reverse-Blocking Protection
The MCP73830/L provides protection from a faulted or
shorted input. Without the protection, a faulted or
shorted input would discharge the battery pack through
the body diode of the internal pass transistor.
6.2 PCB Layout Issues
For optimum voltage regulation, place the battery pack
as close as possible to the device’s V
BAT
and V
SS
pins,
which is recommended to minimize voltage drops
along the high current carrying PCB traces.
If the PCB layout is used as a heat sink, adding many
vias in the heat sink pad can help conduct more heat to
the backplane of the PCB, thus reducing the maximum
junction temperature. Figure 6-4 and Figure 6-5 depict
a typical layout with PCB heat sinking.
FIGURE 6-3: Typical Layout (Top).
FIGURE 6-4: Typical Layout (Top Metal).
TABLE 6-1: MLCC CAPACITOR EXAMPLE
MLCC
Capacitors
Temperature
Range
Tolerance
X7R -55C to + 125C±15%
X5R -55C to + 85C ±15%
PowerDissipation 5.5V 3.0V–220mA
0.55W
·
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