User manual

Hardware Specification

7.7 HIGH-SPEED COMMUNICATION BOARDS

For high-speed emulator communication with a target (Section 2.4.2 “High-Speed

Communication”), use the following boards:

• High-Speed Driver Board

• High-Speed Receiver Board

7.7.1 High-Speed Driver Board

The high-speed driver board consists of two separate multipoint LVDS (Low Voltage

Differential Signal) transmitters and receivers for clock and data. Multipoint LVDS

requires 100 ohm terminations at each driver output and receiver input, per the

standard, and multipoint configurations type 2 receivers are used, as these are

intended for control signals or where fail-safe provisions are needed. Even though the

standard allows for any combination of drivers, receivers and/or transceivers of up to

32 on the line, only two will be used. The driver board has a port expansion which is

controlled by an I

C™ interface for sending and receiving status information to the

emulator. The high-speed driver board assembly is inserted into the emulator pod via

the card guide.

FIGURE 7-3: DUAL 8-PIN PINOUT

Note: Data rates up to 40 MIPS are possible.

Bottom of

Receiver Board

J3 Pinout

* future feature

J2 Pinout

Pin Name Function Pin Name Function

1 DATAEN+ Std Data Enable + 5 USPID– *Serial Data –

2 DATAEN– Std Data Enable – 6 CLKEN– Std Clock Enable –

3 CLKEN+ Std Clock Enable + 7 USPIC+ *Serial Clock +

4 USPID+ *Serial Data + 8 USPIC– *Serial Clock –

Pin Name Function Pin Name Function

1 LVC+ LV Std Data + 5 GND Ground

2 LVD– LV Std Data – 6 LVC– LV Std Clock –

3 LVC+ LV Std Clock + 7 Vdd_TGT Vdd on target

4 Vdd Power 8 Vpp_TGT Vpp on target