Datasheet

PAGE 8
dsPIC® DSC FAMILY
dsPIC33F Motor Control Family: 40 MIPS, VDD = 3.3V, Self-Write Flash (continued)
dsPIC33FJ128MC708* 128 16 6 ch 69 80PT —
2 A.D, 18 ch
8 S/H
98 8 8 ✓ 2222 —
dsPIC33FJ256MC710* 256 30 6 ch 85 100PT —
2 A/D, 24 ch
8 S/H
9 8 8 8 ✓ 2 2 2 2 —
dsPIC33F General Purpose Family: 40 MIPS, VDD = 3.3V, Self-Write Flash
dsPIC33FJ64GP706* 64 16 6 ch 53 64PT
2 ADC, 18 ch
2 S/H
— 9 8 8 — — 2 2 2 2 1
dsPIC33FJ64GP708* 64 16 6 ch 69 80PT
2 ADC, 24 ch
2 S/H
—988——22221
dsPIC33FJ64GP710* 64 16 6 ch 85 100PT
2 ADC, 32 ch
2 S/H
— 9 8 8 — — 2 2 2 2 1
dsPIC33FJ128GP708* 128 16 6 ch 69 80PT
2 ADC, 24 ch
2 S/H
—988——22221
dsPIC33FJ256GP506* 256 16 6 ch 53 64PT 1 ADC, 18 ch — 9 8 8 — — 2 2 2 1 1
dsPIC33FJ256GP710* 256 30 6 ch 85 100PT
2 ADC, 32 ch
2 S/H
—988——22221
Product
Program
(Flash)
Kbytes
SRAM
KBytes
DMA
I/O Pins
(max.)
Packages
A/D 12-bit
500 ksps
A/D 10-bit
1,000 ksps
Timer
16-bit
Input
Cap
Output
Comp/
Std PWM
Motor
Control
PWM
Quad Enc.
Interface
UART SPI™
I
2
C™
CAN
Codec
Interface
NOTE: dsPIC33 devices with 2 ADCs can achieve 2.2 Msps conversion rate.
*Contact Microchip Technology for availability date.
Abbreviations are found on the last page of the Selector Guide.
NE
W
NE
W
NE
W
NE
W
NE
W
NE
W
NE
W
NE
W