Datasheet

MICROCHIP MRF24W GETTING
STARTED GUIDE FOR
MRF24WB0MA/B, MRF24WG0MA/B
FOR MLA V5
 2013 Microchip Technology Inc. Preliminary DS52108A-page 91
Chapter 5. Microchip Development Board Specifics
5.1 PICDEM.NET 2 USAGE
This section provides instructions specific to the PICDEM.net 2 Development Board.
Note the connector (J1) on the PICtail. Table 5-1 provides the PICDEM.net 2 PICtail pin
descriptions. If you are using Explorer 16 Development Board, skip this section.
TABLE 5-1: PICDEM.NET 2 PICTAIL PIN DESCRIPTION
5.2 EXPLORER 16 USAGE
This section provides instructions specific to the Explorer 16 Development Board. If you
are using PICDEM.net 2 Development Board, skip this section. The male connector
(J2) on the PICtail is the female connector (J5) on the Explorer 16 Development Board.
Table 5-2 provides the PICDEM.net 2 PICtail pin descriptions.
TABLE 5-2: EXPLORER 16 PICTAIL PIN DESCRIPTION
Function I/O Pin Descriptions
CSN I J1-24/RC2 SPI chip select (asserted low)
SCK I J1-12/RC3 SPI clock
SDO O J1-10/RC4 SPI data out from MRF24W
SDI I J1-8/RC5 SPI data in to MRF24W
INT_NX O J1-27 Interrupt signal from MRF24W (asserted low)
RST_N I J1-25/RB1 Master Reset (asserted low)
CE_N I J1-23/RB2 MRF24W disable (asserted low)
VDD I J1-26 5V power input
Function I/O Pin Descriptions
CSN I J2-1/RB2 SPI chip select (asserted low)
SCK I J2-3/RF6/SCK1 SPI clock
SDO O J2-5/RF7/SDI1_E SPI data out from MRF24W
SDI I J2-7/RF8/SDO1_E SPI data in to MRF24W
INT_NX O J2-18/RE8/INT1 Interrupt signal from MRF24W (asserted low)
RST_N I J2-28/RF0 Master Reset (asserted low)
CE_N I J2-30/RF1 MRF24W disable (asserted low)
VDD I J2-21 & J2-22 3.3V power input