User manual

UTILITY-BAND BPSK 6.0 kbps PLM

PICtail™ PLUS DAUGHTER BOARD

USER’S GUIDE

Appendix C. Troubleshooting Guide

C.1 FREQUENTLY ASKED QUESTIONS

This appendix discusses common operational issues and methods to resolve them.

C.1.1 The daughter boards are not able to communicate on the power

line. What can I do to fix the problem?

Possible reasons for the daughter boards to lose the communication link are:

C.1.1.1 DAUGHTER BOARDS CONNECTED ON TWO DIFFERENT POWER

SUPPLY PHASES

Connecting daughter boards to power outlets on different phases may result in partial

or total loss of the communication link. If you observe that the daughter boards are not

able to communicate, try relocating the daughter boards to other power outlets or use

a signal coupler device to couple the communication signals across the phases, as

described in 1.2 “Board Setup”.

C.1.1.2 SOFTWARE CONFIGURATION NOT COMPATIBLE WITH HARDWARE

DESIGN

Some of the configuration settings are hardware dependent and these settings should

match the hardware being used. Following configuration settings are hardware

dependent:

• Hi-Z signal polarity (PLM_OE, default: PLM_OE_ACTIVE_LOW_HIZ)

• Hi-Z signal pin (PLM_OE_LAT, default: LATF, #0)

• ADC input channel (PLM_ADC_CHNL, default: 8)

• Carrier frequency (PLM_FC, default: 72000)

C.1.1.3 POTENTIOMETER (P1) SET AT A LOW VALUE

The potentiometer (P1) is used to adjust the average output amplitude transmitted from

the daughter board. If the potentiometer is set too low the transmitted signal power may

not to be reliably detected by the other daughter board. It is preferable to set the

potentiometer value close to the MAX position (turn counter clockwise).

C.1.1.4 DISSIMILAR CONFIGURATION SETTINGS

Daughter boards will not be able to communicate if they are programmed with

dissimilar settings for certain configuration options like carrier frequency, Forward Error

Correction (FEC), framing and baud rate.

C.1.1.5 IMPROPER JUMPER CONFIGURATION

Ensure that the jumpers at CS (JP2) and RX (JP3) are in place (default: JP2 - RF0, JP3

- AN8). Improper jumper settings can disable the transmitter or receiver sections of the

daughter board.