Datasheet

Schematics and Layouts
© 2008 Microchip Technology Inc. DS70336A-page 57
FIGURE 1-5: DAUGHTER BOARD SCHEMATIC 4 OF 5
AUXILIARY INPUT
*Shunt J6 must be connected
+3.3V_DIG
D14LED_0805
9VANA_GND
V
IN
J9
RP1
5k DNP
9VANA_GND
J10
DNP
9VANA_GND
R60
10k
TP1
V+
TP2
GND
+9V
J6
V
IN
C22
100uF 25V
POT
B
A
2
2
2
2
1
2
1
11
1
1
when using either the Explorer 16 or
16-bit 28-pin Starter Development
1
2
2
1
1
3
5k DNP
1
1
A
B
1
Board to power the Daughter Board