Datasheet

PIC24FJ256DA210 Development Board User’s Guide

DS51911A-page 48  2010 Microchip Technology Inc.

FIGURE 4-11: CURRENT MEASUREMENT LOCATIONS

4.4.8 Other Considerations

The PIC24FJ256DA210 supports two slightly different configuration options for its

Enhanced PMP. The configurations are selected by the ALTPMP

Configuration bit; this

allows some flexibility in hardware design by remapping several address and Chip

Select lines to different pins. Table 4-9 summarizes the differences.

The development board is designed with the assumption that the Enhanced PMP inter-

face is in the alternate configuration (ALTPMP

= 0). This allows the use of three addi-

tional analog pins that would otherwise be used by the EPMP module. Users should

keep this in mind when designing applications that will be used with the development

board.

TABLE 4-9: PIN ASSIGNMENTS FOR ALTERNATE EPMP CONFIGURATIONS

Pin # Pin Function

ALTPMP

‘0’‘1’

10 AN17/C1IND/RP21/PMA5/PMA18/CN8/RG6 PMA18 PMA5

40 RPI32/PMA18/PMA5/CN75/RF12 PMA5 PMA18

59 SDA2/PMA20/PMA4/CN36/RA3 PMA4 PMA20

60 TDI/PMA21/PMA3/CN37/RA4 PMA3 PMA21

66 SCL1/RPI36/PMA22/PMCS2/CN43/RA14 PMCS2 PMA22