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Integrated Circuits (ICs)
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93AA46/56/66
DS20067K-page 10
1998-2012 Microchip Technology Inc.
FIGURE 2-8:
ERA
L TIMING
Ensured at Vcc = +4.5V to +6.0V
.
1
0
CS
CLK
DI
DO
T
CSL
Tri-stat
e
T
EC
Busy
Ready
S
tandby
0
Tr
i
-
s
ta
t
e
Check St
atus
10
T
CZ
T
SV
1
...
...
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9
10
11
12
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