Datasheet
24AA65/24LC65/24C65
DS21073K-page 4 © 2008 Microchip Technology Inc.
TABLE 1-2: AC CHARACTERISTICS
FIGURE 1-2: BUS TIMING DATA
Parameter Symbol
V
CC = 1.8V-6.0V
STD. Mode
VCC = 4.5-6.0V
FAST Mode
Units Remarks
Min Max Min Max
Clock frequency F
CLK —100 — 400kHz
Clock high time THIGH 4000 — 600 — ns
Clock low time T
LOW 4700 — 1300 — ns
SDA and SCL rise time TR — 1000 — 300 ns (Note 1)
SDA and SCL fall time TF — 300 — 300 ns (Note 1)
Start condition setup time T
HD:STA 4000 — 600 — ns After this period the first
clock pulse is generated
Start condition setup time T
SU:STA 4700 — 600 — ns Only relevant for
repeated Start condition
Data input hold time T
HD:DAT 0— 0 —ns
Data input setup time TSU:DAT 250 — 100 — ns
Stop condition setup time T
SU:STO 4000 — 600 — ns
Output valid from clock T
AA — 3500 — 900 ns (Note 2)
Bus free time TBUF 4700 — 1300 — ns Time the bus must be
free before a new
transmission can start
Output fall time from V
IH min to
V
IL max
T
OF — 250 20 + 0.1
C
B
250 ns (Note 1), CB ≤ 100 pF
Input filter spike suppression
(SDA and SCL pins)
T
SP 50 — 50 — ns (Note 3)
Write cycle time T
WR — 5 — 5 ms/page (Note 4)
Endurance
High Endurance Block
Rest of Array
10M
1M
—
—
10M
1M
—
—
cycles 25°C, (Note 5)
Note 1: Not 100 percent tested. C
B = total capacitance of one bus line in pF.
2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
3: The combined T
SP and VHYS specifications are due to new Schmitt Trigger inputs which provide improved
noise and spike suppression. This eliminates the need for a Ti specification for standard operation.
4: The times shown are for a single page of 8 bytes. Multiply by the number of pages loaded into the write
cache for total time.
5: This parameter is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance™ Model which can be downloaded at www.microchip.com.
SCL
SDA
IN
SDA
OUT
T
SU:STA
TSP
TAA
TF
TLOW
THIGH
THD:STA
THD:DAT
TSU:DAT
TSU:STO
TBUF
TAA
TR