Datasheet

24AA515/24LC515/24FC515
DS21673G-page 12 © 2008 Microchip Technology Inc.
FIGURE 8-2: RANDOM READ
FIGURE 8-3: SEQUENTIAL READ
x
Bus Activity
Master
SDA Line
Bus Activity
A
C
K
N
O
A
C
K
A
C
K
A
C
K
A
C
K
S
T
O
P
S
T
A
R
T
Control
Byte
Address
High Byte
Address
Low Byte
Control
Byte
Data
Byte
S
T
A
R
T
X = “don’t care” bit
S 1010
BAA
0
010
S 101
0
BAA
1
010
P
Bus Activity
Master
SDA Line
Bus Activity
Control
Byte
Data n Data n + 1
Data n + 2
Data n + X
N
O
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
S
T
O
P
P