Datasheet

ManualsBrandsMICROCHIP TECHNOLOGY ManualsIntegrated Circuits (ICs)MSOP 8 32 kBit 4 K x 8

24AA32AF/24LC32AF

Device Selection Table

Features:

• Single Supply with Operation down to 1.7V for

24AA32AF devices, 2.5V for 24LC32AF devices

• Low-Power CMOS Technology:

- Read current 400 μA, max.

- Standby current 1 μA, max. (I-temp)

• 2-Wire Serial Interface, I

C™ Compatible

• Packages with 3 Address Pins are Cascadable up

to Eight Devices

• Schmitt Trigger Inputs for Noise Suppression

• Output Slope Control to Eliminate Ground Bounce

• 100 kHz and 400 kHz Clock Compatibility

• Page Write Time 5 ms max.

• Self-Timed Erase/Write Cycle

• 32-Byte Page Write Buffer

• Hardware Write-Protect for 1/4 Array

(C00h-FFFh)

• ESD Protection > 4,000V

• More than 1 Million Erase/Write Cycles

• Data Retention > 200 Years

• Factory Programming Available

• Packages Include 8-lead PDIP, SOIC, TSSOP,

MSOP, TDFN and 5-lead SOT-23

• Pb-Free and RoHS Compliant

• Temperature Ranges:

- Industrial (I): -40°C to +85°C

- Automotive (E): -40°C to +125°C

Description:

The Microchip Technology Inc. 24AA32AF/24LC32AF

(24XX32AF*) is a 32 Kbit Electrically Erasable PROM.

The device is organized as a single block of 4K x 8-bit

memory with a 2-wire serial interface. Low-voltage

design permits operation down to 1.7V, with standby

and read currents of only 1 μA and 400 μA,

respectively. It has been developed for advanced, low-

power applications such as personal communications

or data acquisition. The 24XX32AF also has a page

write capability for up to 32 bytes of data. Functional

address lines allow up to eight devices on the same

bus, for up to 256 Kbits address space. The 24XX32AF

is available in the standard 8-pin PDIP, surface mount

SOIC, TSSOP, TDFN and MSOP packages. The

24XX32AF is also available in the 5-lead SOT-23

package.

Block Diagram

Package Types

Part

Number

VCC

Range

Max. Clock

Frequency

Temp.

Ranges

24AA32AF 1.7-5.5 400 kHz

(1)

24LC32AF 2.5-5.5 400 kHz I, E

Note 1: 100 kHz for VCC <2.5V.

HV Generator

EEPROM

Array

Page Latches

YDEC

XDEC

Sense Amp.

R/W Control

I/O

Control

Logic

I/O

Memory

Control

Logic

SCL

SDA

Vcc

VCC

SCL

SDA

PDIP, MSOP, SOIC, TSSOP

SOT-23

SCL

SDA

TDFN

SCL

SDA

32K I

™

Serial EEPROM with Quarter-Array Write-Protect

*24XX32AF is used in this document as a generic part number for the 24AA32AF/24LC32AF devices.

Summary of content (30 pages)

PAGE 1
24AA32AF/24LC32AF 32K I2C™ Serial EEPROM with Quarter-Array Write-Protect Device Selection Table Description: Part Number VCC Range Max. Clock Frequency Temp. Ranges 24AA32AF 1.7-5.5 400 kHz(1) I 24LC32AF 2.5-5.5 400 kHz I, E Note 1: The Microchip Technology Inc. 24AA32AF/24LC32AF (24XX32AF*) is a 32 Kbit Electrically Erasable PROM. The device is organized as a single block of 4K x 8-bit memory with a 2-wire serial interface. Low-voltage design permits operation down to 1.
PAGE 2
4AA32AF/24LC32AF 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings (†) VCC .............................................................................................................................................................................6.5V All inputs and outputs w.r.t. VSS ......................................................................................................... -0.3V to VCC +1.0V Storage temperature .......................................................................
PAGE 3
24AA32AF/24LC32AF TABLE 1-2: AC CHARACTERISTICS Electrical Characteristics: Industrial (I): VCC = +1.7V to 5.5V TA = -40°C to +85°C Automotive (E): VCC = +2.5V to 5.5V TA = -40°C to 125°C AC CHARACTERISTICS Param. No. Sym. Characteristic Min. Max. Units Conditions 1 FCLK Clock frequency — — 100 400 kHz 1.7V ≤ VCC < 2.5V 2.5V ≤ VCC ≤ 5.5V 2 THIGH Clock high time 4000 600 — — ns 1.7V ≤ VCC < 2.5V 2.5V ≤ VCC ≤ 5.5V 3 TLOW Clock low time 4700 1300 — — ns 1.7V ≤ VCC < 2.5V 2.
PAGE 4
24AA32AF/24LC32AF FIGURE 1-1: BUS TIMING DATA 5 SCL SDA IN 7 3 4 D4 2 8 10 9 6 16 14 13 SDA OUT WP DS22184A-page 4 (protected) (unprotected) 11 12 © 2009 Microchip Technology Inc.
PAGE 5
24AA32AF/24LC32AF 2.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 2-1. TABLE 2-1: PIN FUNCTION TABLE Name PDIP SOIC TSSOP TDFN MSOP SOT-23 A0 1 1 1 1 1 — Chip Address Input A1 2 2 2 2 2 — Chip Address Input A2 3 3 3 3 3 — Chip Address Input VSS 4 4 4 4 4 2 Ground SDA 5 5 5 5 5 3 Serial Address/Data I/O 2.1 SCL 6 6 6 6 6 1 Serial Clock WP 7 7 7 7 7 5 Write-Protect Input VCC 8 8 8 8 8 4 +1.7V to 5.
PAGE 6
24AA32AF/24LC32AF 3.0 FUNCTIONAL DESCRIPTION The 24XX32AF supports a bidirectional, 2-wire bus and data transmission protocol. A device that sends data onto the bus is defined as transmitter, while a device receiving data is defined as a receiver. The bus has to be controlled by a master device which generates the Serial Clock (SCL), controls the bus access and generates the Start and Stop conditions, while the 24XX32AF works as slave.
PAGE 7
24AA32AF/24LC32AF 5.0 DEVICE ADDRESSING A control byte is the first byte received following the Start condition from the master device (Figure 5-1). The control byte consists of a four-bit control code. For the 24XX32AF, this is set as ‘1010’ binary for read and write operations. The next three bits of the control byte are the Chip Select bits (A2, A1, A0). The Chip Select bits allow the use of up to eight 24XX32AF devices on the same bus and are used to select which device is accessed.
PAGE 8
24AA32AF/24LC32AF 6.0 WRITE OPERATIONS 6.1 Byte Write Following the Start condition from the master, the control code (4 bits), the Chip Select (3 bits), and the R/W bit (which is a logic low) are clocked onto the bus by the master transmitter. This indicates to the addressed slave receiver that the address high byte will follow once it has generated an Acknowledge bit during the ninth clock cycle.
PAGE 9
24AA32AF/24LC32AF FIGURE 6-1: BYTE WRITE S T A R T Bus Activity Master Control Byte Address High Byte AA S 1 0 1 0A 210 0 SDA Line S T O P Data xxx x P A C K A C K A C K A C K Bus Activity Address Low Byte x = “don’t care” bit FIGURE 6-2: PAGE WRITE Bus Activity Master S T A R T SDA Line AA S10 1 0A 2100 Control Byte Bus Activity Address High Byte Address Low Byte Data Byte 0 S T O P P Data Byte 31 xxxx A C K A C K A C K A C K A C K x = “don’t care” bit © 2009 Microchip T
PAGE 10
24AA32AF/24LC32AF 7.0 ACKNOWLEDGE POLLING Since the device will not acknowledge during a write cycle, this can be used to determine when the cycle is complete (this feature can be used to maximize bus throughput). Once the Stop condition for a Write command has been issued from the master, the device initiates the internally-timed write cycle. ACK polling can then be initiated immediately. This involves the master sending a Start condition followed by the control byte for a Write command (R/W = 0).
PAGE 11
24AA32AF/24LC32AF 8.0 READ OPERATION 8.3 Read operations are initiated in the same way as write operations, with the exception that the R/W bit of the control byte is set to ‘1’. There are three basic types of read operations: current address read, random read and sequential read. 8.1 Current Address Read The 24XX32AF contains an address counter that maintains the address of the last word accessed, internally incremented by ‘1’.
PAGE 12
24AA32AF/24LC32AF FIGURE 8-2: Bus Activity Master RANDOM READ S T A R T Control Byte Address High Byte AA xxxx S1010A 2100 A C Bus Activity K x = “don’t care” bit S T A R T Address Low Byte Bus Activity Master S T O P Data Byte S 1 0 1 0 A A A1 210 SDA Line FIGURE 8-3: Control Byte A C K A C K P N O A C K A C K SEQUENTIAL READ Control Byte Data n Data n + 1 Data n + 2 Data n + x S T O P P SDA Line Bus Activity DS22184A-page 12 A C K A C K A C K A C K N O A C K © 2009 Microchip
PAGE 13
24AA32AF/24LC32AF 9.0 PACKAGING INFORMATION 9.1 Package Marking Information 8-Lead PDIP (300 mil) XXXXXXXX T/XXXNNN YYWW 8-Lead SOIC (3.90 mm) XXXXXXXT XXXXYYWW NNN 8-Lead TSSOP Example: 24LC32AF I/P e3 13F 0527 Example: 4LC32AFI SN e3 0527 13F Example: XXXX 4LAF TYWW I527 NNN 13F 8-Lead MSOP XXXXXT YWWNNN 8-Lead 2x3 TDFN XXX YWW NN 5-Lead SOT-23 XXNN © 2009 Microchip Technology Inc.
PAGE 14
24AA32AF/24LC32AF 1st Line Marking Codes Part Number TSSOP MSOP TDFN I Temp. SOT-23 E Temp. I Temp. E Temp. 24AA32A 4AAF 4A32FT AH1 — 6PNN — 24LC32A 4LAF 4L32FT AH4 AH5 6QNN 6RNN Note: T = Temperature grade (I, E). Legend: XX...
PAGE 15
24AA32AF/24LC32AF 3 & ' !& " & 4 # * !( ! ! & 4 % & & # & && 255*** ' '5 4 N NOTE 1 E1 1 3 2 D E A2 A L A1 c e eB b1 b 6 &! ' ! 9 ' &! 7"') % ! 7,8. 7 7 & ; < & & 7: 1 , = = - 1 ! & & = = .
PAGE 16
24AA32AF/24LC32AF ! "" #$ %& ! ' 3 & ' !& " & 4 # * !( ! ! & 4 % & & # & && 255*** ' '5 4 D e N E E1 NOTE 1 1 2 3 α h b h A2 A c φ L A1 L1 6 &! ' ! 9 ' &! 7"') % ! β 99 . . 7 7 7: ; < & : 8 & = = = = = # # 4 4 !! & # %% + 1 , : > #& .
PAGE 17
24AA32AF/24LC32AF ! "" #$ %& ! ' 3 & ' !& " & 4 # * !( ! ! & 4 % & & # & && 255*** ' '5 4 © 2009 Microchip Technology Inc.
PAGE 18
24AA32AF/24LC32AF () )" * ! ( +%+ ( ! 3 & ' !& " & 4 # * !( ! ! & 4 % & & # & && 255*** ' '5 4 D N E E1 NOTE 1 1 2 b e c A φ A2 A1 L L1 6 &! ' ! 9 ' &! 7"') % ! 99 . . 7 7 7: ; < & : 8 & = = < = # # 4 4 !! & # %% ? 1 , : > #& . # # 4 > #& .
PAGE 19
24AA32AF/24LC32AF , $ * - . /0 0 %12 ( , 3 & ' !& " & 4 # * !( ! ! & 4 % & & # & && 255*** ' '5 4 © 2009 Microchip Technology Inc.
PAGE 20
24AA32AF/24LC32AF , $ * - . /0 0 %12 ( , 3 & ' !& " & 4 # * !( ! ! & 4 % & & # & && 255*** ' '5 4 DS22184A-page 20 © 2009 Microchip Technology Inc.
PAGE 21
24AA32AF/24LC32AF . " ! * - . . ! 3 & ' !& " & 4 # * !( ! ! & 4 % & & # & && 255*** ' '5 4 D N E E1 NOTE 1 1 2 e b A2 A c φ L L1 A1 6 &! ' ! 9 ' &! 7"') % ! 99 . . 7 7 7: ; < & : 8 & = = < = # # 4 4 !! & # %% ? 1 , : > #& . # # 4 > #& .
PAGE 22
24AA32AF/24LC32AF 2 ! (" " !( !( / 3 & ' !& " & 4 # * !( ! ! & 4 % & & # & && 255*** ' '5 4 b N E E1 3 2 1 e e1 D A2 A c φ A1 L L1 6 &! ' ! 9 ' &! 7"') % ! 99 . . 7 7: ; 7 9 # & 1 , :"&! # 9 # & : 8 & = < = - = : > #& . = - # # 4 > #& .
PAGE 23
24AA32AF/24LC32AF APPENDIX A: REVISION HISTORY Revision A (05/09) Original Release. © 2009 Microchip Technology Inc.
PAGE 25
24AA32AF/24LC32AF THE MICROCHIP WEB SITE CUSTOMER SUPPORT Microchip provides online support via our WWW site at www.microchip.com. This web site is used as a means to make files and information easily available to customers.
PAGE 26
24AA32AF/24LC32AF READER RESPONSE It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150. Please list the following information, and use this outline to provide us with your comments about this document.
PAGE 27
24AA32AF/24LC32AF PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. X PART NO. Temperature Package Range Device Device: I2C 24AA32AF: 1.7V, 32 Kbit Serial EEPROM with half-array write-protect 24AA32AFT: 1.7V, 32 Kbit I2C Serial EEPROM with half-array write-protect (Tape and Reel) 24LC32AF: 2.5V, 32 Kbit I2C Serial EEPROM with half-array write-protect 24LC32AFT: 2.
PAGE 29
Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature.
PAGE 30
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