Datasheet

24LC21
DS21095K-page 10  1994-2012 Microchip Technology Inc.
5.0 ACKNOWLEDGE POLLING
Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (this feature can be used to maximize bus
throughput). Once the Stop condition for a Write
command has been issued from the master, the device
initiates the internally timed write cycle. ACK polling
can be initiated immediately. This involves the master
sending a Start condition followed by the control byte
for a Write command (R/W
= 0). If the device is still
busy with the write cycle, then no ACK will be returned.
If the cycle is complete, then the device will return the
ACK and the master can then proceed with the next
Read or Write command. See Figure 5-1 for the flow
diagram.
FIGURE 5-1: ACKNOWLEDGE
POLLING FLOW
6.0 WRITE PROTECTION
When using the 24LC21 in the Bidirectional mode, the
V
CLK pin operates as the write-protect control pin.
Setting V
CLK high allows normal write operations, while
setting V
CLK low prevents writing to any location in the
array. Connecting the V
CLK pin to VSS would allow the
24LC21 to operate as a serial ROM, although this
configuration would prevent using the device in the
Transmit-only mode.
Send
Write Command
Send Stop
Condition to
Initiate Write Cycle
Send Start
Send Control Byte
with R/W
= 0
Did Device
Acknowledge
(ACK = 0)?
Next
Operation
No
Yes
21095K.book Page 10 Wednesday, December 5, 2012 2:28 PM