Data Sheet

2010-2021 Microchip Technology Inc. and its subsidiaries DS20001191U-page 13
24AA128/24LC128/24FC128
8.0 READ OPERATION
Read operations are initiated in much the same way as
write operations with the exception that the R/W bit of
the control byte is set to one. There are three basic
types of read operations: current address read, random
read and sequential read.
8.1 Current Address Read
The 24XX128 contains an address counter that
maintains the address of the last word accessed,
internally incremented by one. Therefore, if the
previous read access was to address n (n is any legal
address), the next current address read operation
would access data from address n+1.
Upon receipt of the control byte with R/W
bit set to 1,
the 24XX128 issues an Acknowledge and transmits the
8-bit data word. The host will not acknowledge the
transfer, but does generate a Stop condition and the
24XX128 discontinues transmission (Figure 8-1).
FIGURE 8-1: CURRENT ADDRESS
READ
8.2 Random Read
Random read operations allow the host to access any
memory location in a random manner. To perform this
type of read operation, the word address must first be
set. This is done by sending the word address to the
24XX128 as part of a write operation (R/W
bit set to
0). Once the word address is sent, the host generates
a Start condition following the Acknowledge. This
terminates the write operation, but not before the
internal Address Pointer is set. The host then issues
the control byte again, but with the R/W bit set to a 1.
The 24XX128 will then issue an Acknowledge and
transmit the 8-bit data word. The host will not
acknowledge the transfer but does generate a Stop
condition, which causes the 24XX128 to discontinue
transmission (Figure 8-2). After a random read
command, the internal address counter will point to the
address location following the one that was just read.
8.3 Sequential Read
Sequential reads are initiated in the same way as a
random read except that after the 24XX128 transmits
the first data byte, the host issues an Acknowledge (as
opposed to the Stop condition used in a random read).
This Acknowledge directs the 24XX128 to transmit the
next sequentially addressed 8-bit word (Figure 8-3).
Following the final byte transmitted to the host, the host
will not generate an Acknowledge but will generate a
Stop condition.
To provide sequential reads, the 24XX128 contains an
internal Address Pointer which is incremented by one
at the completion of each operation. This Address
Pointer allows the entire memory contents to be serially
read during one operation. The internal Address
Pointer will automatically roll over from address 3FFF
to address 0000 if the host acknowledges the byte
received from the array address 3FFF.
FIGURE 8-2: RANDOM READ
Bus Activity
Host
SDA Line
Bus Activity
P
S
S
T
O
P
Control
Byte
S
T
A
R
T
Data
A
C
K
N
O
A
C
K
1100
AAA
1
Byte
210
xx
Bus Activity
Host
SDA Line
Bus Activity
A
C
K
N
O
A
C
K
A
C
K
A
C
K
A
C
K
S
T
O
P
S
T
A
R
T
Control
Byte
Address
High Byte
Address
Low Byte
Control
Byte
Data
Byte
S
T
A
R
T
x = dont care bit
S 1010
AAA
0
210
S 1010
AAA
1
210
P