Datasheet
Table Of Contents
- 24AA1025/24LC1025/24FC1025
- Device Selection Table:
- Features:
- Description:
- Package Type
- Block Diagram
- 1.0 Electrical Characteristics
- Absolute Maximum Ratings(†)
- TABLE 1-1: DC Characteristics
- TABLE 1-2: AC Characteristics
- Note 1: Not 100% tested. Cb = total capacitance of one bus line in pF.
- 2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
- 3: The combined Tsp and Vhys specifications are due to new Schmitt Trigger inputs which provide improved noise spike suppression. This eliminates the need for a TI specification for standard operation.
- 4: This parameter is not tested but established by characterization. For endurance estimates in a specific application, please consult the Total Endurance™ Model which can be obtained from Microchip’s web site at www.microchip.com.
- FIGURE 1-1: Bus Timing Data
- Absolute Maximum Ratings(†)
- 2.0 Pin Descriptions
- 3.0 Functional Description
- 4.0 Bus Characteristics
- 5.0 Device Addressing
- 6.0 Write Operations
- 7.0 Acknowledge Polling
- 8.0 Read Operation
- 9.0 Packaging Information
- Appendix A: Revision History
- Product ID System
- Trademarks
- Worldwide Sales
24AA1025/24LC1025/24FC1025
DS20001941L-page 22 2005-2013 Microchip Technology Inc.
APPENDIX A: REVISION HISTORY
Revision A (02/2005)
Original release.
Revision B (09/2005)
Section 1.0 Electrical Characteristics: revised Ambient
Temperature; Revised Table 1-1; Revised Section 2.1
and Section 2.5.
Revision C (04/2006)
Revised Features, Maximum Read Current and Table
1-1, D9; Revised Table 2-1, V
CC; Revised Section 6.3.
Revision D (01/2007)
Revised Device Selection Table; Features Section;
Changed 1.8V to 1.7V; Revised Tables 1-1, 1-2, 2-1;
Revised Product ID System; Replaced Package
Drawings.
Revision E (03/2007)
Replaced Package Drawings (Rev. AM).
Revision F (10/2008)
Corrections on the Device Selection Table; Corrections
on the Description; Corrections on the AC Characteris-
tics table; Corrections on the Pin Function Table;
Corrections on the Product ID System; Updated
Package Drawings.
Revision G (01/2010)
Added 8-Lead SOIC Package.
Revision H (01/2011)
Revised PDIP Package Type Diagram; Revised
Section 1.0 Electrical Characteristics; Revised SOIC
Package Marking Information (3.90mm).
Revision J (07/2011)
Revised Table 1-2: AC Characteristics.
Revision K (04/2012)
Revised document title (removed CMOS); Revised
Section 5.1.
Revision L (08/2013)
Features Section: Revised ESD Protection to 4000V.