Datasheet
24AA1026/24LC1026/24FC1026
DS20002270D-page 4 2011-2013 Microchip Technology Inc.
FIGURE 1-1: BUS TIMING DATA
11 TSU:WP WP setup time 4000
4000
600
600
600
—
—
—
—
—
ns 1.7V VCC 2.5V
2.5V V
CC 4.5V, E-temp
2.5V V
CC 5.5V
1.8V V
CC 2.5V (24FC1026 only)
2.5V V
CC 5.5V (24FC1026 only)
12 T
HD:WP WP hold time 4700
4700
1300
1300
1300
—
—
—
—
—
ns 1.7V VCC 2.5V
2.5V V
CC 4.5V, E-temp
2.5V V
CC 5.5V
1.8V V
CC 2.5V (24FC1026 only)
2.5V V
CC 5.5V (24FC1026 only)
13 T
AA Output valid from clock
(Note 2)
—
—
—
—
—
3500
3500
900
900
400
ns 1.7V VCC 2.5V
2.5V V
CC 4.5V, E-temp
2.5V V
CC 5.5V
1.8V V
CC 2.5V (24FC1026 only)
2.5V V
CC 5.5V (24FC1026 only)
14 T
BUF Bus free time: Time the bus
must be free before a new
transmission can start
4700
4700
1300
1300
500
—
—
—
—
—
ns 1.7V VCC 2.5V
2.5V V
CC 4.5V, E-temp
2.5V V
CC 5.5V
1.8V V
CC 2.5V (24FC1026 only)
2.5V V
CC 5.5V (24FC1026 only)
15 T
SP Input filter spike suppression
(SDA and SCL pins)
— 50 ns All except 24FC1026 (Note 1 and Note 3)
16 T
WC Write cycle time (byte or page) — 5 ms —
17 Endurance 1,000,000 — cycles Page mode, 25°C, V
CC = 5.5V (Note 4)
AC CHARACTERISTICS (Continued)
Industrial (I): V
CC = +1.7V to 5.5V TA = -40°C to +85°C
Automotive (E): Vcc = +2.5V to 5.5V T
A = -40°C to +125°C
Param.
No.
Sym. Characteristic Min. Max. Units Conditions
Note 1: Not 100% tested. C
B = total capacitance of one bus line in pF.
2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum
300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
3: The combined T
SP and VHYS specifications are due to new Schmitt Trigger inputs which provide improved noise spike
suppression. This eliminates the need for a TI specification for standard operation.
4: This parameter is not tested but established by characterization. For endurance estimates in a specific application,
please consult the Total Endurance™ Model which can be obtained from Microchip’s web site at www.microchip.com.
(unprotected)
(protected)
SCL
SDA
IN
SDA
OUT
WP
5
7
6
15
3
2
89
13
D3
4
10
11
12
14