Datasheet

23LCV512
DS25157A-page 12 Preliminary  2012 Microchip Technology Inc.
3.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Tab le 3-1.
TABLE 3-1: PIN FUNCTION TABLE
3.1 Chip Select (CS)
A low level on this pin selects the device. A high level
deselects the device and forces it into Standby mode.
When the device is deselected, SO goes to the high-
impedance state, allowing multiple parts to share the
same SPI bus. After power-up, a low level on CS
is
required, prior to any sequence being initiated.
3.2 Serial Output (SO)
The SO pin is used to transfer data out of the
23LCV512. During a read cycle, data is shifted out on
this pin after the falling edge of the serial clock.
3.3 Serial Input (SI)
The SI pin is used to transfer data into the device. It
receives instructions, addresses, and data. Data is
latched on the rising edge of the serial clock.
3.4 Serial Dual Interface Pins(SIO0,
SIO1)
The SIO0 and SIO1 pins are used for SDI mode of
operation. Functionality of these I/O pins is shared with
SO and SI.
3.5 Serial Clock (SCK)
The SCK is used to synchronize the communication
between a master and the 23LCV512. Instructions,
addresses or data present on the SI pin are latched on
the rising edge of the clock input, while data on the SO
pin is updated after the falling edge of the clock input.
3.6 VBAT supply Input
The VBAT pin is used as an input for external backup
supply to maintain SRAM data when V
CC is below the
VTRIP point. If the V
BAT function is not being used, it is
recommended to connect this pin to V
SS.
3.7 SPI and SDI Pin Designations
Name
SOIC/
PDIP
TSSOP
Function
CS
1 Chip Select Input
SO/SIO1 2 Serial Data Output/SDI Pin
NC 3 No Connect
V
SS 4Ground
SI/SIO0 5 Serial Data Input/SDI Pin
SCK
6
Serial Clock Input
V
BAT 7 External Backup Supply
VCC 8 Power Supply
CS
SIO1
NC
Vss
Vcc
VBAT
SCK
SIO0
1
2
3
4
8
7
6
5
SDI Mode:
CS
SO
NC
Vss
Vcc
VBAT
SCK
SI
1
2
3
4
8
7
6
5
SPI Mode: