Datasheet

 2008-2013 Microchip Technology Inc. DS20002122B-page 7
11AA02E48/11AA02E64
3.3 Acknowledge
An Acknowledge routine occurs after each byte is
transmitted, including the start header. This routine
consists of two bits. The first bit is transmitted by the
master, and the second bit is transmitted by the slave.
The Master Acknowledge, or MAK, is signified by trans-
mitting a ‘
1’, and informs the slave that the current
operation is to be continued. Conversely, a Not
Acknowledge, or NoMAK, is signified by transmitting a
‘0’, and is used to end the current operation (and initiate
the write cycle for write operations).
The slave Acknowledge, or SAK, is also signified by
transmitting a ‘
1’, and confirms proper communication.
However, unlike the NoMAK, the NoSAK is signified by
the lack of a middle edge during the bit period.
A NoSAK will occur for the following events:
• Following the start header
• Following the device address, if no slave on the
bus matches the transmitted address
• Following the command byte, if the command is
invalid, including Read, CRRD, Write, WRSR,
SETAL, and ERAL during a write cycle.
• If the slave becomes out of sync with the master
• If a command is terminated prematurely by using
a NoMAK, with the exception of immediately after
the device address.
See Figure 3.3 and Figure 3-4 for details.
If a NoSAK is received from the slave after any byte
(except the start header), an error has occurred. The
master should then perform a standby pulse and begin
the desired command again.
FIGURE 3-3: ACKNOWLEDGE
ROUTINE
FIGURE 3-4: ACKNOWLEDGE BITS
3.4 Device Addressing
A device address byte is the first byte received from the
master device following the start header. The device
address byte consists of a four-bit family code, for the
11AA02EXX this is set as ‘
1010’. The last four bits of
the device address byte are the device code, which is
hardwired to ‘0000’.
FIGURE 3-5: DEVICE ADDRESS BYTE
ALLOCATION
3.5 Bus Conflict Protection
To help guard against high current conditions arising
from bus conflicts, the 11AA02EXX features a current-
limited output driver. The I
OL and IOH specifications
describe the maximum current that can be sunk or
sourced, respectively, by the SCIO pin. The
11AA02EXX will vary the output driver impedance to
ensure that the maximum current level is not exceeded.
Note: A MAK must always be transmitted
following the start header.
Note: When a NoMAK is used to end a
WRITE
or WRSR instruction, the write cycle is not
initiated if no bytes of data have been
received.
Note: In order to guard against bus contention, a
NoSAK will occur after the start header.
Master Slave
MAK
SAK
MAK (‘1’)
NoMAK (‘0’)
SAK (‘1’)
NoSAK
(1)
Note 1:
valid SAK.
A NoSAK is defined as any sequence that is not a
1010
000
MAK
SLAVE ADDRESS
0
SAK