Datasheet

2008-2013 Microchip Technology Inc. DS20002122B-page 13
11AA02E48/11AA02E64
4.5 Read Status Register (RDSR)
Instruction
The RDSR instruction provides access to the STATUS
register. The STATUS register may be read at any time,
even during a write cycle. The STATUS register is
formatted as follows:
The Write-In-Process (WIP) bit indicates whether the
11AA02EXX is busy with a write operation. When set to
a ‘
1’, a write is in progress, when set to a ‘0’, no write
is in progress. This bit is read-only.
The Write Enable Latch (WEL) bit indicates the status
of the write enable latch. When set to a ‘
1’, the latch
allows writes to the array, when set to a ‘
0’, the latch
prohibits writes to the array. This bit is set and cleared
using the WREN and WRDI instructions, respectively.
This bit is read-only for any other instruction.
The Block Protection (BP0 and BP1) bits indicate
which blocks are currently write-protected. These bits
are set by the user through the WRSR instruction.
These bits are nonvolatile.
The WIP and WEL bits will update dynamically (asyn-
chronous to issuing the
RDSR instruction). Further-
more, after the STATUS register data is received, the
master can provide a MAK during the Acknowledge
sequence to request that the data be transmitted again.
This allows the master to continuously monitor the WIP
and WEL bits without the need to issue another full
command.
Once the master is finished, it provides a NoMAK to
end the operation.
FIGURE 4-6: READ STATUS REGISTER COMMAND SEQUENCE
7654 3 2 1 0
XXXX BP1 BP0 WEL WIP
Note: Bits 4-7 are don’t cares, and will read as ‘
0’.
Note: If Read Status Register command is
initiated while the 11AA02EXX is currently
executing an internal write cycle on the
STATUS register, the new Block
Protection bit values will be read during
the entire command.
Note: The current drawn for a Read Status
Register command during a write cycle is
a combination of the I
CC Read and ICC
Write operating currents.
11010100
Start Header
SCIO
Device Address
MAK
00001010
MAK
Command
11000000
MAK
NoSAK
SAK
Standby Pulse
SCIO
SAK
STATUS Register Data
3210
NoMAK
SAK
The STATUS register data can continuously be read, or polled, by transmitting a MAK in place of the NoMAK.Note:
0000